The Leader of the Orchestra: Getting Started with Virtuoso ADE Verifier
The members of an orchestra are often great virtuosi on their own instruments, but the conductor - the maestro – is equally important. The maestro has his score on the conductor’s stand to know exactly...
View ArticleVirtuoso Video Diary: Flexible Connectivity Support of Dummy Devices
Virtuoso Video Diary is envisaged to be an online journal that will relay information about Virtuoso videos that are available in the Cadence Online Support Video Library. For IC6.1.7 and ICADV12.2,...
View ArticleVirtuoso Video Diary: Tips and Tricks on Virtuoso Visualization and Analysis...
Virtuoso Video Diary is envisaged to be an online journal that will relay information about Virtuoso videos that are available in the Cadence Online Support Video Library. For IC6.1.7 and ICADV12.2,...
View ArticleAnalog Design Resonance: When a Plan Comes Together
Yes, indeed, we all love it when a plan comes together. A plan for running all the simulations you need, using different combinations of tests, corners, variables, and run modes. A plan that you can...
View ArticleVirtuoso Video Diary: Redesigned Virtuoso Forms
Enhanced User Experience with Redesigned Virtuoso FormsResearch and customer feedback has revealed that you feel some Virtuoso forms are quite complex, with too many options displayed on the forms and...
View ArticleWaveform Thumbnails
Wouldn't it be great if you could see your plots directly on the schematic? Well in ADE Explorer, now you can!Run a simulation in Explorer and open the design in tab and choose Waveforms from the...
View ArticleIEEE Recognition of Cadence Software at DAC 2016
Cadence was awarded with the IEEE Donald O. Pederson Best Paper Award—EDA’s most prestigious recognition of its kind—for the best paper published in IEEE Transactions on CAD over the past two years....
View ArticleVirtuoso Variation Option: Reliable High Yield Design with Scaled-Sigma Sampling
What’s Scaled-Sigma Sampling?Scaled-Sigma Sampling (SSS) is an efficient algorithm to solve the high yield estimation problem, which happens when your circuit needs to have really low failure rate,...
View ArticleAdding Weighted Noise Via Calculator Custom Function
Applying a weighting factor to a Noise Summary run requires lots of steps and the results cannot be evaluated without using the form. Wouldn't it be much easier if you could have a calculator function...
View ArticleVirtuoso Video Diary: Getting Started with the New ADE Product Suite
Hey, did you hear the buzz around the new Virtuoso ADE product suite, which was introduced in IC6.1.7? The products in this suite—Virtuoso ADE Explorer, Virtuoso ADE Assembler, and Virtuoso ADE...
View ArticleVirtuoso Variation Option: Reliable High-Yield Design with Scaled-Sigma Sampling
What’s Scaled-Sigma Sampling?Scaled-sigma sampling (SSS) is an efficient algorithm to solve the high-yield estimation problem, which happens when your circuit needs to have a really low failure rate,...
View ArticleAnalog Design Resonance: Quick and Efficient Regression Scripts–Now Possible...
You must have experienced and appreciated the new Virtuoso ADE product suite that is packaged with a lot of easy-to-use, productivity-enhancing, and robust features. Did you notice the tools also offer...
View ArticleHigh-Sigma Showdown: Which Method is Better?
The adoption and usage of advanced node technology (16nm and below) has been extraordinary over the last few years. However, along with the benefits in power and area, the new nodes also contain new...
View ArticleVirtuoso Video Diary: Introducing WSP Manager
Are you an advanced node layout or CAD engineer trying to find a methodology for routing designs in the Virtuoso platform? Interested to learn how to specify tracks for correct-by-construction designs...
View ArticleAnalog Design Resonance: Playing with Filters
We'd like to welcome guest writer Yanyan Qiao from our Cadence Japan AE team. Many thanks for her contribution!Today analog design has become very challenging. Analog circuit designers need tools...
View ArticleVirtuoso Video Diary: SKILL IDE Performance Analysis Tools
As a SKILL code developer, do you spend a major chunk of your time in fine-tuning your SKILL code? I am sure nobody writes perfect code in the first attempt. Producing efficient and bug-free code...
View ArticleVirtuoso Video Diary: SPD – A Symbolic Way to Edit Your Physical Design
The best way to complete a complex task is to break it into smaller, simpler tasks.This is exactly what Symbolic Placement of Devices, popularly known as SPD, does for layout engineers. SPD is a...
View ArticleVirtuoso Video Diary: Creating Net Groups and Constraining Them with Spacing...
In this new age of complex designs and scaling of technology nodes, there are more number of wires per given square unit of area. As a result, applying constraints is considered wise to make sure...
View ArticleVirtuoso Video Diary: I Am Not Promoting Layout Hierarchy Manipulation!
Are you contemplating manipulating your layout hierarchy by adding or removing a few levels? Are you wondering if having a layout hierarchy out of sync with the schematic is advisable? Well, neither I...
View ArticleVirtuoso Video Diary: ADE Explorer Setup - Save Now and Reuse Later!
Have you ever come across a situation where you have a test setup in ADE Explorer and you need to create similar setups with slight variations and then save them in different cellviews? Before starting...
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